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1 typical a pplica t ion fea t ures descrip t ion boost controller with power factor correction the lt ? 8312 is a power factor correction ( pfc) boost controller. a LT8312-based design can achieve a power factor of greater than 0.99 by actively modulating the input current, allowing compliance with most harmonic current emission requirements. the LT8312 is well suited for a wide variety of off-line applications. the input range can be scaled up or down, depending mainly on the choice of external components. efficiencies higher than 95% can be achieved with output power levels up to 250w. a pplica t ions n pfc boost with minimum number of external com- ponents n v in and v out limited only by external components n active power factor correction n low harmonic distortion n overvoltage protection n energy star compliant (<0.5w no-load operation) n 16-lead msop package n industrial n aviation l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. efficiency 90v to 265v ac 0.1f b1 gbu404 10f 2.2f 499k 499k 1m 95.3k 560f 2 v out 400v 0.5a 4.7pf 4.7f 100k 221k 100k 100k 2k 1m 1m 9.53k 0.01 8312 ta01a d3 d4 cmr5h-06 d2 20 20 4:1 ? ? v in v in_sense fb gate en/uvlo dcm LT8312 v c sense v ref ovp gnd intv cc power (w) 0 40 80 100 20 60 120 140 160 8312 g01 91 efficiency (%) 92 94 93 95 97 96 98 99 115vac 230vac 50hz universal input 200w pfc boost converter lt 8312 8312f for more information www.linear.com/LT8312
2 p in c on f igura t ion a bsolu t e maxi m u m r a t ings en / uvlo ................................................................... 30 v v in ............................................................................ 42 v int v cc ...................................................................... 18 v fb ............................................................................... 3 v v c ............................................................................... 5v v in ( sense ) ................................................................ 1 ma ov p ............................................................................. 4 v sense ...................................................................... 0. 4 v dcm ....................................................................... 3 ma o perating temperature range ( note 2) .... C4 0 c to 125 c storage temperature range .................. C 65 c to 150 c (note 1) 1 2 3 4 5 6 7 8 gnd gnd gnd v ref ovp v c gnd gnd 16 15 14 13 12 11 10 9 sense gate intv cc en/uvlo v in dcm fb top view ms package 16-lead plastic msop v in_sense ja = 125c/w o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range LT8312ems#pbf LT8312ems#trpbf 8312 16-lead plastic msop C40c to 125c LT8312ims#pbf LT8312ims#trpbf 8312 16-lead plastic msop C40c to 125c LT8312hms#pbf LT8312hms#trpbf 8312 16-lead plastic msop C40c to 150c LT8312mpms#pbf LT8312mpms#trpbf 8312 16-lead plastic msop C55c to 150c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ lt 8312 8312f for more information www.linear.com/LT8312
3 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. parameter conditions min typ max units input voltage range 10 38 v quiescent current v en/uvlo = 0.2v not switching 45 60 70 70 a a v in quiescent current, intv cc overdriven v intvcc = 11v 60 a v in shunt regulator voltage i = 1ma 40 v v in shunt regulator current limit 8 ma intv cc quiescent current v en/uvlo = 0.2v v en/uvlo = 1.5v, not switching 12.5 1.8 15.5 2.2 17.5 2.7 a ma en/uvlo pin threshold en/uvlo pin v oltage rising l 1.21 1.25 1.29 v en/uvlo pin hysteresis current en/uvlo = 1v 8 10 12 a v ref voltage 0a load 200a load l l 1.97 1.95 2.0 1.98 2.03 2.03 v v sense current limit threshold 96 102 107 mv minimum sense current limit 3 mv sense input bias current current out of pin 15 a current sense blanking time 90 130 170 ns fb voltage l 1.22 1.25 1.28 v fb voltage line regulation 10v < v in < 35v 0.01 0.03 %/v fb pin bias current (note 3), fb = 1.25v, ovp = 1.35v 100 600 na fb error amplifier voltage gain v vc /v fb 180 v/v fb error amplifier transconductance i = 5a 170 mhos fb low detection voltage 0.1 v dcm current turn-on threshold current out of pin 80 a maximum oscillator frequency 400 khz linear regulator intv cc regulation voltage 9.8 10 10.4 v dropout (v in -intv cc ) i intvcc = C10ma, v in = 10v 500 900 mv current limit intv cc < 9.5v intv cc > 9.5v 17 80 25 120 ma ma gate driver t r gate driver output rise time c l = 3300pf 18 ns t f gate driver output fall time c l = 3300pf 18 ns gate output low (v ol ) 0.01 v gate output high (v oh ) intv cc C 50mv v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LT8312e is guaranteed to meet specified performance from 0c to 125c junction temperature. specification over the C40c and 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LT8312i is guaranteed to meet specified performance from C40c to 125c operating junction temperature range. the LT8312h is guaranteed to meet performance specifications over the C40c to 150c operating junction temperature range. the LT8312mp is guaranteed to meet performance specifications over the C55c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated for junction temperatures greater than 125c. note 3: current flows out of the fb pin. lt 8312 8312f for more information www.linear.com/LT8312
4 typical p er f or m ance c harac t eris t ics v ref vs temperature v ref vs v in sense pin threshold current vs temperature intv cc vs temperature intv cc vs v in en/uvlo threshold vs temperature v in i q vs temperature input voltage hysteresis current vs temperature v in shunt voltage vs temperature temperature (c) ?50 0 50 75 ?25 25 100 125 150 8312 g01 1.2 en/uvlo (v) 1.22 1.26 1.24 1.28 1.3 rising falling temperature (c) ?50 0 50 75 ?25 25 100 125 150 8312 g02 10 10.5 en/uvlo hysteresis current (a) 11 11.5 12 temperature (c) ?50 0 50 75 ?25 25 100 125 150 8312 g03 0 i q (a) 20 10 30 40 60 50 100 90 80 70 v in = 12v v in = 24v temperature (c) ?50 1.900 v ref (v) 1.925 1.975 2.000 2.025 2.100 2.075 0 50 75 1.950 2.050 ?25 25 100 125 150 8312 g04 v in = 24v with no load v in = 24v with 200a load v in (v) 10 1.95 v ref (v) 1.96 1.98 1.99 2 2.01 2.05 2.03 2.04 1.97 2.02 15 25 20 30 35 40 8312 g05 no load 200a load temperature (c) ?50 0 sense current limit (mv) 20 60 80 100 120 0 50 75 40 ?25 25 100 125 150 8312 g06 max i lim temperature (c) ?50 9.5 intv cc (v) 9.75 10.25 10.5 0 50 75 10 ?25 25 100 125 150 8312 g07 25ma load 10ma load no load v in (v) 5 15 25 30 10 20 35 40 8312 g08 9 intv cc (v) 9.2 9.4 9.6 9.8 10 10.2 temperature (c) ?50 0 50 75 ?25 25 100 125 150 8312 g09 39 v in shunt voltage (v) 39.5 40 40.5 41 41.5 42 i shunt = 1ma lt 8312 8312f for more information www.linear.com/LT8312
5 typical p er f or m ance c harac t eris t ics thd vs output power power factor vs output power maximum v in shunt current vs temperature temperature (c) ?50 0 50 75 ?25 25 100 125 150 8312 g10 5 shunt current (ma) 6 7 8 9 10 power (w) 0 40 80 100 20 60 120 140 160 8312 g11 0 thd 10 30 20 40 50 60 115vac 230vac 50hz power (w) 0 40 80 100 20 60 120 140 160 8312 g12 0.60 power factor 0.65 0.75 0.70 0.80 0.95 0.90 0.85 1.00 115vac 230vac 50hz lt 8312 8312f for more information www.linear.com/LT8312
6 p in func t ions gnd (pins 1, 2, 3, 7, 8): ground. v ref (pin 4): voltage reference output pin, typically 2v. this pin drives a resistor divider for the ovp pin. can supply up to 200a. ovp (pin 5): overvoltage protection. this pin accepts a dc voltage to compare to the voltage output information. when output voltage information is above the ovp, the part divides the minimum switching frequency by 8, around 500hz. this protects devices connected to the output. this also allows the part to operate with very little power con - sumption with no load to meet energy star requirements. v c (pin 6): compensation pin for internal error amplifier. connect a series rc from this pin to ground to compensate the switching regulator. a 100 pf capacitor in parallel helps eliminate noise. fb (pin 9): voltage loop feedback pin. fb is used to regulate the output voltage. dcm (pin 10): discontinuous conduction mode detection pin. connect a capacitor and resistor in series with this pin to the third winding. v in (pin 11): input voltage. this pin supplies current to the internal start-up circuitry and to the intv cc ldo. this pin must be locally bypassed with a capacitor. a 42 v shunt regulator is internally connected to this pin. en /uvlo (pin 12): enable/undervoltage lockout. a resis- tor divider connected to v in is tied to this pin to program the minimum input voltage at which the LT8312 will turn on. when below 1.25 v, the part will draw 60 a with most of the internal circuitry disabled and a 10 a hysteresis current will be pulled out of the en/uvlo pin. when above 1.25v, the part will be enabled and begin to switch and the 10a hysteresis current is turned off. intv cc (pin 13): regulated supply for internal loads and gate driver. supplied from v in and regulates to 10v (typical). intv cc must be bypassed with a 4.7 f capacitor placed close to the pin. gate ( pin 14): n- channel fet gate driver output. switches between intv cc and gnd. driven to gnd during shutdown state and stays high during low voltage states. sense (pin 15): the current sense input for the control loop. kelvin connect this pin to the positive terminal of the switch current sense resistor, r sense , in the source of the nfet. the negative terminal of the current sense resistor should be connected to the gnd plane close to the ic. v in(sense) (pin 16): line voltage sense pin. the pin is used for sensing the ac line voltage to perform power factor correction. connect a resistor in series with the line voltage to this pin. lt 8312 8312f for more information www.linear.com/LT8312
7 b lock diagra m 14 1.22v ? + a7 a4 m2 v in r10 r1 r5 r9 r11 r13 r14 r3 v out r4 r6 8312 bd driver gate 15 sense q s s r master latch multiplier current comparator oscillator gnd 1, 2, 3, 7, 8 13 intv cc m1 c5 c3 c2 c6 l1 v in r2 ? + a1 one shot v 600mv q1 + ? ? + start-up internal reg a3 a6 ? + a8 1.22v vc c4 6 fb 9 v ref r8 4 ovp 5 en/uvlo 12 dcm 10 v in(sense) 16 11 c1 l2 d2 d1 a2 lt 8312 8312f for more information www.linear.com/LT8312
8 o pera t ion the LT8312 is a power factor correction boost controller ic. it provides high power factor and low harmonic distor- tion in applications with current mode control and critical conduction mode. active power factor correction is becoming a require - ment for offline power supplies. a power factor of one is achieved if the current drawn is proportional to the input voltage. the LT8312 modulates the peak current limit with a scaled version of the input voltage. this technique can provide power factors of 0.97 or greater. the block diagram shows an overall view of the system. the external components are in a boost topology configu - ration. the auxiliary winding supplies power to the part in steady-state operation. the v in pin supplies power to an internal ldo that generates 10 v at the intv cc pin. the control circuitry consists of an error amplifier, a multiplier, a current comparator, and a master latch, which will be explained in the following sections. a comparator is used to detect discontinuous conduction mode ( dcm) with a cap connected to the auxiliary winding. the part features a 1.9a gate driver. the LT8312 is designed for off-line applications. the en/uvlo and a resistor divider are configured for a micropower hysteretic start-up. in the block diagram, r2 is used to stand off the high voltage supply voltage. the internal ldo starts to supply current to the intv cc pin when v in is above 2.5 v. the v in and intv cc capacitor are charged by the current from r2. when v in exceeds the turn-on threshold and intv cc is in regulation at 10v, the part begins to switch. the v in hysteresis is set by the en/uvlo resistor divider. the auxiliary winding provides power to v in when its voltage is higher than the v in volt- age. a voltage shunt is provided for fault protection and can sink 8ma of current when v in is over 40v. during a typical cycle, the gate driver turns the external mosfet on and a current flows through the inductor. this current increases at a rate proportional to the input voltage. the control loop determines the maximum current and the current comparator turns the switch off when the current level is reached. when the switch turns off, the inductor current begins to flow through the diode con - nected to the output capacitor. this current decreases at a rate proportional to the difference between the output voltage and the input voltage. when the current decreases to zero, the output diode turns off and the voltage on the drain of the mosfet starts to oscillate from the parasitic capacitance and the inductor. the auxiliary winding has the same voltage across it as the main inductor and rings too. the capacitor connected to the dcm pin, c1, trips the comparator a2, which serves as a dv/dt detector, when the ringing occurs. the dv/dt detector waits for the ringing waveform to reach its minimum value and then the switch turns back on. this switching behavior is similar to zero volt switching and minimizes the amount of energy lost when the switch is turned back on and improves efficiency as much as 5%. since this part operates on the edge of continuous conduction mode and discontinuous conduc - tion mode, the operating mode is called critical conduction mode (or boundar y conduction mode). the output voltage is regulated with a resistor divider connected to the fb pin. the output of the error amplifier is the vc pin. this node needs a capacitor to compensate the control loop. power factor correction when the v in(sense) pin is connected to the supply volt- age with a resistor, the current limit is proportional to the supply voltage. if the LT8312 is configured with a fast control loop, the vc pin would adjust to the changes of the v in(sense) . the only way for the multiplier to function is to set the control loop to be an order of magnitude slower than the fundamental frequency of the v in(sense) signal. in an offline application, the fundamental frequency of the supply voltage is 120 hz so the control loop unity gain frequency needs to be set less than approximately 12hz. start-up the LT8312 uses a hysteretic start-up to operate from high offline voltages. a resistor connected to the supply voltage protects the part from high voltages. this resistor is connected to the v in pin on the part and bypassed with a capacitor. when the resistor charges the v in pin to a turn-on voltage set with the en/uvlo resistor divider and the intv cc pin is at its regulation point, the part begins to switch. the resistor cannot provide power for the part in lt 8312 8312f for more information www.linear.com/LT8312
9 o pera t ion steady state, but relies on the capacitor to start up the part, then the auxiliary winding begins to provide power to the v in pin along with the resistor. an internal voltage clamp is attached to the v in pin to prevent the resistor current from allowing v in to go above the absolute maximum voltage of the pin. the internal clamp is set at 40 v and is capable of 8ma ( typical) of current at room temperature. setting the v in turn-on and turn-off voltages a large voltage difference between the v in turn-on voltage and the v in turn- off voltage is preferred to allow time for the third winding to power the part. the en/uvlo sets these two voltages. the pin has a 10 a current sink when the pins voltage is below 1.25 v and 0 a when above 1.25v. the v in pin connects to a resistor divider as shown in figure 1. the uvlo threshold for v in rising is: v in(uvlo,rising) = 1.25v ? r1 + r2 r2 + 10a ? r1 the uvlo threshold for v in falling is : v in(uvlo, falling) = 1.25v ? r1 + r2 r2 programming output voltage the output voltage is set using a resistor divider from the output capacitor to the fb pin. from the block diagram the resistors r3 and r4 form a resistor divider from the output capacitor. the output voltage equation is: v out = v bg ? r3 + r4 r5 the v bg voltage is equal to fb voltage in electrical speci- fication table. setting v in(sense) resistor the v in (sense) resistor sets the current feeding the internal multiplier that modulates the current limit for power factor correction. at the maximum line voltage, v max , the current is set to 360 a. under this condition, the resistor value is equal to (v max /360a). critical conduction mode operation critical conduction mode is a variable frequency switching scheme that always returns the inductor current to zero with every cycle. the dcm pin uses a fast current input comparator in combination with a small capacitor to detect dv/dt on the auxiliary winding. to eliminate false tripping, a blanking time of 200 ns is applied after the switch turns off. the detector looks for 80 a of current through the dcm pin due to falling voltage on the third winding when the output diode turns off. this is not the optimal time to turn the switch on because the switch voltage is still close to v out and would waste all the energy stored in the parasitic capacitance on the switch node. discontinuous ringing begins when the output diode current reaches zero en/uvlo LT8312 v in gnd r2 8312 f01 r1 figure 1. undervoltage lockout (uvlo) lt 8312 8312f for more information www.linear.com/LT8312
10 o pera t ion and the energy in the parasitic capacitance on the switch node transfers to the input capacitor. this is a second- order network composed of the parasitic capacitance on the switch node and the main inductor. the minimum voltage of the switch node during this discontinuous ring is 2v in -v out . the LT8312 turns the switch back on at this time, during the discontinuous switch waveform, by sensing when the slope of the switch waveform goes from negative to positive using the dv/dt detector. this switching technique may increase efficiency by 5%. at low current limits, the frequency of critical conduc - tion mode can become very high. the LT8312 features a maximum frequency clamp of 400 khz. the part operates in discontinuous conduction mode when the natural criti - cal conduction mode frequency is higher than 400khz. sense resistor selection the resistor, r sense , between the source of the external n- channel mosfet and gnd should be selected to provide an adequate switch current to drive the application without exceeding the current limit threshold. minimum current limit the LT8312 features a minimum current limit of approxi - mately 3% of the peak current limit. this helps improve the harmonic distortion during the input supplies off-line crossover period. universal input the LT8312 operates over the universal input voltage range of 90v ac to 265v ac. loop compensation the feedback loop is a traditional g m error amplifier. the loop crossover frequency is set much lower than twice the line frequency for pfc to work properly. in a typical application, the compensation capacitor is 1f. mosfet and diode selection with a strong 1.9 a gate driver, the LT8312 can effectively drive most high voltage mosfets. a low q g mosfet is recommended to maximize efficiency. in most applications , the r ds(on) should be chosen to limit the temperature rise of the mosfet. the drain of the mosfet is stressed to v out during the time the mosfet is off and the diode is conducting current. the diode is stressed to v out when the switch is on. the average current through the diode is equal to the load current. discontinuous mode detection the discontinuous mode detector uses ac-coupling to detect the ringing on the auxiliary winding. a 22 pf ca - pacitor with a 30 k resistor in series is recommended in most designs. power factor correction/harmonic content the LT8312 attains high power factor and low harmonic content by making the peak current of the main power switch proportional to the line voltage by using and internal multiplier. a power factor of >0.97 is easily attainable for most applications by following the design equations in this data sheet. with proper design, LT8312 applications can easily meet most harmonic standards. lt 8312 8312f for more information www.linear.com/LT8312
11 typical a pplica t ions universal input 150w pfc boost converter c14 4.7f r26 10k 1% r19 0 d6 1n4148w r15 0.015 1206 8312 ta02 r14 100 q1 ipa50r190ce ? ? v in v in_sense fb gate en/uvlo dcm LT8312 v c sense v ref ovp gnd gnd gnd gnd gnd intv cc intv cc c5 680nf c3 100pf c8 4.7f 16v c9 100pf 50v r13 1m 1206 r16 1m 1206 r11 10 1% r12 9.53k r10 2k c15 100pf c10 100f 450v c7 27pf c6 4.7nf c4 10f, 50v d3 cmz5934b d1 bav20w d2 bav20w r9 47 1206 d4 1n4005 d5 cmr5h-06 + r17 1m 1206 j2 400v/0.375a + ? 1 2 r8 2.4m 1% r3 301k 1% r18 75k r4 11.8k 1% r7 150k 1% 1206 r6 150k 1% 1206 r2 499k 1% 1206 r1 499k 1% 1206 r5 24.9k 1% c13 1nf c12 1f l4 300h b1 gbu404 3 2 c2 0.47f 4 ?? j1 c1 0.22f z1 1 2 f1 3.15a l n 90-265vac l1 15mh 4 1 3 2 l3 760802122 450h 10:1 3 7 12 6 16 12 4 5 1 2 3 11 10 6 9 14 15 13 8 7 + lt 8312 8312f for more information www.linear.com/LT8312
12 typical a pplica t ions avionics input 60w pfc boost converter c14 470nf r26 82.5k 1% r19 0 d6 1n4148w r15 0.04 1206 8312 ta03 r14 100 q1 ipa50r190ce ? ? v in v in_sense fb gate en/uvlo dcm LT8312 v c sense v ref ovp gnd gnd gnd gnd gnd intv cc intv cc c5 27nf c3 100pf c8 4.7f 16v c9 100pf 50v r13 1m 1206 r16 1m 1206 r11 10 1% r12 9.53k r10 2k c15 100pf c10 47f 450v c7 27pf c6 4.7nf d3 cmz5934b d1 bav20w d2 bav20w r9 47 1206 d4 1n4005 d5 cmr2u-06 + r17 1m 1206 j2 400v/0.15a + ? 1 2 r8 2.4m 1% r3 301k 1% r18 75k r4 11.8k 1% r7 100k 1% 1206 r6 100k 1% 1206 r2 499k 1% 1206 r1 499k 1% 1206 r5 24.9k 1% c13 1nf c12 220nf l4 1mh b1 kbp204g 3 2 c12 100nf 4 ?? j1 c1 47nf z1 1 2 f1 2.5a l n 97~134vac 400hz l1 27mh 4 1 3 2 l3 760801130 750h 3 7 12 6 16 12 4 5 1 2 3 11 10 6 9 14 15 13 8 7 c4 10f, 50v + lt 8312 8312f for more information www.linear.com/LT8312
13 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. ms package 16-lead plastic msop (reference ltc dwg # 05-08-1669 rev a) msop (ms16) 0213 rev a 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16151413121110 1 2 3 4 5 6 7 8 9 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 4.039 0.102 (.159 .004) (note 3) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) ms package 16-lead plastic msop (reference ltc dwg # 05-08-1669 rev a) lt 8312 8312f for more information www.linear.com/LT8312
14 ? linear technology corporation 2015 lt 0115 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT8312 r ela t e d p ar t s typical a pplica t ion part number description comments lt3798 off-line isolated no opto flyback controller with active pfc v in and v out limited only by external components lt3752/ lt3752-1 active clamp synchronous forward controllers with internal housekeeping controller input voltage range: lt3752: 6.5v to 100v, lt3752-1: limited only by eternal components lt3753 active clamp synchronous forward controller input voltage range: 8.5v to 100v lt8311 synchronous rectifier controller with opto-coupler driver for forward converters optimized for use with primary-side lt3752/lt3752-1, lt3753 and lt8310 controllers lt3748 100v isolated flyback controller 5v v in 100v, no opto flyback, msop-16 with high voltage spacing lt c ? 3765/ ltc3766 synchronous no opto forward controller chip set with active clamp reset direct flux limit, supports self starting secondary forward control ltc3723-1/ ltc3723-2 synchronous push-pull and full-bridge controllers high efficiency with on-chip mosfet drivers, adjustable synchronous rectification timing ltc3722/ ltc3722-2 synchronous full bridge controllers adaptive or manual delay control for zero voltage switching, adjustable synchronous rectification timing 90v to 265v ac 0.1f 10f 2.2f 499k 499k 1m 95.3k 560f 2 v out 400v 0.5a 4.7pf 4.7f 100k 221k 100k 100k 2k 1m 1m 9.53k 0.01 8312 ta04 d3 d4 d2 20 20 4:1 ? ? v in v in_sense fb gate en/uvlo dcm LT8312 v c sense v ref ovp gnd intv cc universal input 200w pfc boost converter lt 8312 8312f for more information www.linear.com/LT8312

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